Recursive synthesis of digital circuits leads to systematic design methods, reuse of building blocks, and clean mathematical models for circuit cost and delay. Recursive integer and matrix multiplication, and Fourier transform, are prime examples. In this talk, I will show that counting networks (parallel counters and other weight determination and comparison circuits), can be synthesized from smaller counting networks in a simple and easily analyzable way. At the end of the recursion, we get to readily-available AND and OR gates, 3-input counters (or full-adders), and 2-out-of-3 majority circuits, which are realizable in a variety of designs, including with emerging atomic-scale digital technologies.
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